Interrupts

What is an Interrupt

An interrupt is a signal to the processor emitted by hardware or software indicating an event that needs immediate attention.

When an interrupt is emitted by Hardware or Software, the processor do the following:

1. Stops the current execution and save its state

2. Executes the Interrupt service routine (Interrupt Handler)

3. Resumes its normal execution

HW Interrupt through Interrupt controller

HW Interrupt request (IRQ) comes from external peripherals to the micro-controller one or two interrupts pins, through Interrupt controller, which multiplexes multiple interrupts lines into the one or two interrupt lines the controller has.

Interrupt Controller may contain three registers:

1. IRR: Interrupt Request Register: Which indicates which of the interrupts is a waiting acknowledgement

2. ISR: Interrupt Service Register: Which indicates which of the interrupts is already acknowledged, but waiting EOI (End Of Interrupt) 

3. IMR: Interrupt Mask Register: Which of the interrupts is masked (shall be ignored)

Also the Interrupt controller may handle interrupts priority scheme.

HW Interrupt through Memory Subsystem

If implemented as part of the memory controller, interrupts are mapped into the system's memory address space.

Memory Controller is responsible for:

1. Write in the memory

2. Read from memory

3. Refresh the memory periodically. (the capacitors of the memory will loose data if not refreshed periodically)

The memory controller may be 

1. Integrated in the same die of the processor (Faster, in case of new RAMs generations, replace the processor to support the new memory)

2. External chip. (slower, in case of new RAMs generations, replace only the memory controller to support the new memory)

SW Interrupts

SW Interrupts are emitted through the processor SW itself when an exceptional case (like divide by zero) happens

Interrupts Categories:

1. Maskable Interrupts: Can be ignored

2. NonMaskable Interrupts: Can not be ignored

3. Interprocessor interrupt: generated by a processor and sent to other processor in multiprocessor systems

4. Spurious Interrupt: Unwanted interrupt, may be generated due to electrical interference

Precise interrupt

leaves the machine in a well-defined state:

• The Program Counter (PC) is saved in a known place.
• All instructions before the one pointed to by the PC have fully executed.
• No instruction beyond the one pointed to by the PC has been executed 
• The execution state of the instruction pointed to by the PC is known.

An interrupt that does not meet these requirements is called an imprecise interrupt.

Jump Table (Branch Table)

Is a table used by the processor to execute all the branches required (By loops, conditions, ...etc)

It may be generated by a compiler or by assembler

Interrupt Vector Table

Is a table used by the processor when an IRQ (Interrupt Request) is emitted. The table contains the address of the Interrupt Service Routine corresponding to each IRQ.